1. Field of the Invention
The present invention relates to a semiconductor integrated circuit (data processor) having a memory and a microprocessor built therein, and more particularly to a semiconductor integrated circuit which suppresses power consumption.
2. Description of the Background Art
Recently, semiconductor integrated circuits have rapidly become finer. At present, a memory and a microprocessor can be built in one chip. In the past when a memory and a microprocessor could not be built in one chip, the memory chip and the microprocessor chip were interconnected by wiring. In the two chip system, it was sufficient that a signal sent to the wiring was observed in order to observe a signal sent between the memory and the microprocessor. In addition, the signal sent between the memory and the microprocessor could always be observed. However, since the memory and the microprocessor are now built on a single chip, there is a problem that the signal sent between the memory and the microprocessor (hereinafter referred to as an "internal signal") can only be observed with difficulty.
In order to more easily observe the internal signal, a semiconductor integrated circuit shown in FIG. 9 has been developed. FIG. 9 is a block diagram showing an example of a semiconductor integrated circuit 200 having a memory and a microprocessor built in one chip according to the prior art.
The internal signal includes address information, data inputted to or outputted from the memory, and a DRAM access control signal. The DRAM access control signal includes a bus status signal, a byte control signal, and a read/write signal.
P1 denotes an external terminal for outputting the bus status signal. P2 denotes an external terminal for inputting and outputting the byte control signal. P3 denotes an external terminal for inputting and outputting the read/write signal. P4 denotes an external terminal for inputting and outputting the address information. P5 denotes an external terminal for inputting and outputting data. S6 denotes a signal line (an address bus) for mutually connecting a microprocessor 1 through a DRAM 2, a cache memory 3 and a memory controller 4 to send the address information. S7 denotes a signal line (data bus) for connecting the microprocessor 1, the DRAM 2 and the cache memory 3 to send the data.
An external bus interface 51 controls the outputs of the address information, the data and the DRAM access control signal described above. S1 to S5 denote signal lines for connecting the external bus interface 51 to the external terminals P1 to P5, respectively.
The features of the operation of the semiconductor integrated circuit 200 are as follows. The internal signal is always outputted to the external terminals P1 to P5. Accordingly, the internal signal can be easily observed by observing the signals in the external terminals P1 to P5. In other words, a signal sent between the memory and the microprocessor can always be observed in the same manner as in a chip in which the memory and the microprocessor were not provided on a common chip.
The microprocessor 1 of the semiconductor integrated circuit 200 can also gain access to external memories. A signal exchange necessary for this access is performed by using the external terminals P1 to P5. FIG. 10 is a general diagram in which the semiconductor integrated circuit 200 is connected to a DRAM 300 that is an external memory. The external terminals P1 to P5 are connected to external terminals Q1 to Q5 of the DRAM 300, respectively (whose functions correspond to those of the external terminals P1 to P5, respectively).
Although it is necessary to output an internal signal from each of the external terminals P1 to P5 in order to monitor the internal operation when testing the semiconductor integrated circuit 200, it is not necessary to output the internal signal when an ordinary user makes use of the semiconductor integrated circuit 200. According to the prior art, however, the internal signal is outputted from each of the external terminals P1 to P5 even when it is unnecessary. In general, power is consumed when the value of the outputted signal is changed. With the semiconductor integrated circuit 200, accordingly, the internal signal is outputted in spite of this being an unnecessary operation. Consequently, unnecessary power consumption is the result of this output.